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Intel Agilex™ FPGAs and SoCs

Intel® Agilex™ FPGA family leverages heterogeneous 3D system-in-package (SiP) technology to integrate Intel’s first FPGA fabric built on 10nm process technology and 2nd Gen Intel® Hyperflex™ FPGA Architecture to deliver up to 40% higher performance or up to 40% lower power for applications in Data Center, Networking, and Edge compute. Intel® Agilex™ SoC FPGAs also integrate the quad-core Arm Cortex-A53 processor to provide high system integration.


Family Variants

  • Intel® Agilex™ F-Series FPGAs and SoCs Intel® Agilex™ F-Series FPGAs and SoC FPGAs bring together transceiver support up to 58 Gbps, increased DSP capabilities, high system integration, and 2nd Gen Intel® Hyperflex™ architecture for a wide range of applications in Data Center, Networking, and Edge. Intel® Agilex™ F-Series FPGA and SoC family also provides the option to integrate the quad-core Arm Cortex-A53 processor to provide high system integration.

  • Intel® Agilex™ I-Series SoC FPGAs Intel® Agilex™ I-Series SoC FPGAs are optimized for high performance processor interface and bandwidth intensive applications. Coherent attach to Intel® Xeon® processors with Compute Express Link, hardened PCIe Gen 5 support and transceiver support up to 112 Gbps make the Intel® Agilex™ I-Series SoC FPGAs a compelling choice for applications which demand massive interface bandwidth and high performance.

  • Intel® Agilex™ M-Series SoC FPGAs Intel® Agilex™ M-Series SoC FPGAs are optimized for compute and memory intensive applications. With Coherent attach to Intel® Xeon® processors, HBM integration, hardened DDR5 controller, and Intel® Optane™ DC persistent memory support the Intel® Agilex™ M-Series SoC FPGAs are optimised for data-intensive applications which need massive memory in addition to high bandwidth. Coming soon.


Features

  • Compute Express Link With the Compute Express Link, Intel® Agilex™ FPGA, and SoC family offers the industry’s first Cache and Memory coherent interconnect to Intel® Xeon® processors. This revolutionary FPGA interconnect will provide low latency and performance gains for memory intensive applications with massive data processing needs.

  • Transceiver Leadership Intel® Agilex™ FPGA and SoC family delivers accelerated transceiver innovation with data rates up to 112Gbps and support for PCI Express up to Gen 5. Intel® Agilex™ FPGA and SoC family will allow customers to choose from a comprehensive transceiver portfolio of 28.3Gbps, 58Gbps, and 112Gbps transceiver tiles. Decoupling the transceiver development accelerates product innovation.

  • DSP Innovation Intel® Agilex™ FPGA and SoC family offers a configurable DSP engine which features hardened support for single-precision FP32, half-precision FP16, BFLOAT16, and INT8 calculations. Intel® Agilex™ FPGA and SoC family also supports low- precision configurations from INT7 to INT2 for maximum flexibility. Intel® Agilex™ FPGA programmability, coupled with the innovations in the DSP blocks is ideal for evolving AI workloads.

  • Heterogeneous 3D SiP Technology With the proven Embedded multi-die Interconnect Bridge (EMIB) technology, Intel® Agilex™ FPGA, and SoC family offers high density die-to-die interconnect for heterogeneous chips and delivers high performance at low cost. A large library of tiles including transceivers, custom IO, custom compute, and Intel® eASIC™ device tiles provide the agility, flexibility, and customization needed for a variety of applications.

  • Hardened Protocol Support Intel® Agilex™ FPGA and SoC family delivers optimal power, performance, and logic utilization efficiency by integrating hardened protocols for many popular functions including 100/200/400G Ethernet, PCIe* Gen 4/5 interface, Interlaken, CPRI, JESD204B/C, and many more.

  • Memory Integration Intel® Agilex™ FPGA and SoC family features the industry’s first FPGA support for Intel® Optane™ DC persistent memory. In addition to this, HBM integration allows up to 16GB of external memory to be offered in-package affording up to 512 GB/s of peak memory bandwidth. Dedicated DDR5/4 hard memory controllers will support further on-board DRAM memory expansion.

  • 2nd Gen Intel® Hyperflex™ Architecture Continuous improvements to the acclaimed Intel® Hyperflex™ architecture deliver improved performance compared to Intel® Stratix® 10 device designs. The 2nd Gen Intel® Hyperflex™ architecture will be extended to all densities and variants of Intel® Agilex™ FPGA and SoC family and thus greatly improve the productivity of customers and reduce time-to-market.

  • Secure Device Manager A Secure Device Manager will serve as the central command center for the entire FPGA, controlling key operations, such as configuration, device security, single event upset (SEU) responses, and power management. The Secure Device Manager creates an unified, secure management system for the FPGA fabric, hard processor system (HPS) in SoCs, embedded hard IP blocks, and I/O blocks.

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