Ultra-Low Additive Jitter PCIe-7 Clock Buffer Solutions
- Braemac
- 3 days ago
- 1 min read
Skyworks SKY53510/80/40
Specifically engineered to meet the timing demands of today’s high-speed designs, the SKY53510/80/40 family of clock fanout buffers from Skyworks are cost-efficient ultra-low additive jitter PCIe-7 solutions with enhanced performance.
As compact, easy-to-integrate clock buffers, the SKY53510/80/40 family features a 3:1 input multiplexer, including crystal input, and up to 10 differential outputs. As flexible, scalable, and reliable timing solutions, SKY53510/80/40 support the continued evolution of PCIe Gen 7, AI expansion, cloud computing, and 5G/6G networks.
With slew rates down to 0.75V/ns and output levels of 1.8V, 2.5V, and 3.3V, these precision timing solutions simplify integration without compromising performance. SKY53510/80/40 reduce signal integrity issues such as reflection, crosstalk, and ground bounce. Additionally, the family’s wide operating temperature range ensures high-speed timing for demanding industrial and telecom applications.
SKY53510/80/40 Key Features
Ultra-low additive RMS phase jitter: 35 fs at 156.25 MHz, 3 fs at 100 MHz (PCIe Gen 7)
Universal format translation: LVPECL, LVCMOS, LVDS, HCSL, CML, SSTL, HSTL, and AC-coupled single-ended inputs; selectable LVPECL, LVDS, HCSL, or tristate outputs
Low power operation: Separate core/output voltage supplies (1.8V, 2.5V, 3.3V)
Integrated LDOs: >70 dBc PSRR for noisy environments
Wide temperature range: -40°C to +95°C ambient (-40°C to +105°C board)
Low noise floor: -166 dBc/Hz for SyncE 156.25 MHz applications
SKY53510/80/40 Key Applications
PCIe Gen 3 through Gen 7
56G/112G/224G SerDes
5G/6G mMIMO radio systems
SyncE and broadcast video
Medical imaging and aerospace/defense
Interested in integrating a SKY53510/80/40 clock buffer as a precision timing solution in next-generation high-speed system design? Reach out to info@Braemac.com for more information.
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