Real-Time Vision Processing with MIPI Connectivity

Altera® Agilex® 5 and Agilex® 3 FPGAs with MIPI D-PHY Support

Source: Altera 

The Altera Agilex® 5 and Agilex® 3 FPGA families provide MIPI D-PHY connectivity for camera and display applications, enabling designers to bring MIPI camera and display data directly into programmable logic. Supporting CSI (Camera Serial Interface) and DSI (Display Serial Interface) applications, Agilex FPGAs allow designers to leverage FPGA fabric for real-time processing, aggregation, adaptation, and control.

With MIPI D-PHY support, Agilex 5 FPGAs provide lane rates up to 3.5 Gbps per lane, while Agilex 3 FPGAs support up to 2.5 Gbps per lane. Both FPGA families support 1, 2, 4, or 8 lanes per interface, providing flexible connectivity options for high-bandwidth sensor and display applications.

Agilex 5 and Agilex 3 MIPI D-PHY Key Features:

• MIPI D-PHY connectivity for CSI (Camera Serial Interface) and DSI (Display Serial Interface) applications

• Up to 3.5 Gbps per lane (Agilex 5)

• Up to 2.5 Gbps per lane (Agilex 3)

• Support for 1, 2, 4, or 8 lanes per interface

• Multiple MIPI D-PHY interfaces per device

Agilex 5 and Agilex 3 MIPI Key Applications:

• Industrial vision

• Robotics

• Medical imaging

• Smart cameras

• Edge AI

• Broadcast

• Display applications

Enable real-time vision processing for edge AI, industrial vision, robotics, and medical imaging applications with Altera® Agilex® 5 and Agilex® 3 FPGAs featuring MIPI D-PHY connectivity. Contact info@Braemac.com to learn more.